1.3 MEMORY SYSTEM

 

1.3  MEMORY SYSTEM

1. Memory System Desiderata

The memory system has three desiderata.

（1）Size: infinitely large, no constraints on program or data set size.

（2）Speed: infinitely fast, latency equal to the fastest memory technology available.

（3）Cost: the per bit cost should approach the lowest-cost technology available.

Clearly these specifications cannot all be achieved, as they are mutually exclusive. However, with the semiconductor and magnetic memory technology of, today, these specifications are closely approximated.

2. Hierarchical Memory

In this section it is shown how designers implement a practical memory that approaches the performance of an ideal memory at reasonable cost. This memory system has a hierarchy of levels: The memory closest to the processor is fast and relatively small, but has a high cost per bit. This level is called the cache; The real memory, sometimes known as main memory, is slower, larger, and has a lower cost per bit than the cache; The lowest level in the hierarchy is usually a magnetic disk that has the longest latency and the lowest bandwidth; however, it can be very large and has a very low cost per bit. This hierarchy is illustrated in Fig.1-4.

Fig. 1-4  Hierarchical Memory

Note that Fig.1-4 does not include the processor register file in the memory hierarchy. The register file is a program-managed cache and is generally not included in the memory system. Also, there can be more than one cache in the hierarchy.

3. Paged Virtual Memory

Paged virtual memory provides the solution to the first desideratum of a very large memory's being available to the processor. Because of the importance of this desideratum, the relationship between virtual and real memory is discussed, first with virtual memory, the processor addresses the disk, the large, slow end of the hierarchy. The memories between the processor and the disk are there to increase the effective performance (reduced latency and increased bandwidth) of the very slow disk. If every instruction and data reference were made to the disk, the processor performance would be slow indeed.

Then why is virtual memory so important? Large memory is needed for large programs and data sets. Early computers with small real memory required that the transfer of data between real memory and disk be managed explicitly by the operating system or the user. Virtual memory provides for automatic management of this portion of the memory hierarchy through a combination of hardware and software aids.

The virtual memory interface is shown in Fig.1-4. A real memory of 16M bytes and a virtual memory of 2G bytes are shown for illustration; many modern virtual-memory systems are much larger than this. Virtual-memory space is divided into equal-sized groups called pages. A page in a modern computer is 1K, 2K, or 4K bytes. Real memory is also divided into the same equal-sized groups, called page frames. When information is moved between virtual-memory space and real-memory space, a complete page is moved.

4. Caches

Section 3 discussed how virtual memory extends the address space of a processor. However, the latency of real memory is too long to support high-performance processors. Even with the high-speed DRAMs used today for real memory, something must be done to overcome this latency problem.

The solution to this performance problem is to add another level to the memory hierarchy, called a cache, shown in Fig.1-5. The allocation of spaces in a three-level memory is shown in Fig.1-6. As discussed in Section 3, the virtual-address space is divided into equal-sized pages. These pages are placed in real-memory frames of the same size. Because a page can be placed in any vacant frame, there is no particular order to the allocation of pages to frames. With the addition of a cache, blocks of 16～32 bytes are taken from the page frames in real memory and placed into a block slot for access by the processor. For modern processors the cache usually has a latency of one processor clock, so that instructions and data may be fetched without delay except when the referenced item is not in the cache.

5. Memory Devices

（1）Randam-Access Memory.

Random-access memory, or RAM, is the kind of memory we usually refer to when we speak of computer memory. It is the most widely used type, and consists of rows of chips with locations established in tables maintained by the control unit.

Fig. 1-5  Page allocation and address translation

Fig. 1-6  Real memory and cache allocation

As the name suggests, items stored in RAM can be gotten (accessed) both easily and in any order (randomly) rather than in some sequence. RAM relies on electric current for all its operations; moreover, if the power is turned off or interrupted, RAM quickly empties itself of all your hard work. Thus, we say RAM is volatile, or nonpermanent.

（2）Read-Only Memory

Read-only memory, or ROM, typically holds programs. These programs are manufactured , or “hard-wired” in place on the ROM chips. For example, a microcomputer has a built-in ROM chip (sometimes called ROM BIOS, for ROM basic input/output system) that stores critical programs such as the one that starts up, or “boots”, the computer. ROM is “slower” than RAM memory, and as a result, items in ROM are transferred to RAM when needed for fast processing.

Items held in ROM can be read, but they cannot be changed or erased by normal input methods. New items cannot be written into ROM. The only way to change items in most forms of ROM is to change the actual circuits.

（3）Magnetic Disks.

The magnetic disk is a circular platter with a smooth surface and a coating that can be magnetized. Data is stored on it as magnetized spots. The reading and recording device, the disk drive, spins the disk past read/write heads that detect or write the magnetized spots on the disk.

（4）CD-ROMS.

Optical disks need thin beams of concentrated light to store and read data. It is a form of laser storage, called CD-ROM.

There are two types of optical disks that can be user-recorded: WORM and erasable optical. WORM stands for “write once, read many”: Data can be written to this disk just one time, but the data can be read many times. Erasable optical disks can be written to, read, and erased.

（5）Magnetic Tape.

A magnetic tape is a narrow plastic strip similar to the tape used in tape recorders. The tapes are read by tape drive moving the tape past a read/write head, which detects or writes magnetized spots on the iron-oxide coating of the tape. Each pattern of spots matches the byte code for character being stored.

KEYWORDS

NOTES

（1）bit，（二进制）位，比特。

·    在纯二进制计数系统中，数字0和1中的任何一个。

·    存储设备中的最小信息容量单位。

（2）hierarchical memory（存储器层次结构）。在同一台计算机中，有工作速度、存储容量、访问方式等均不相同的存储器，这些存储器构成了一个存储结构。

（3）cache（高速缓冲存储器，高速缓存）。一种速度比随机存储器高得多的高速缓冲存储器。它用于加快数据从随机存储器到中央处理器的流动速度。高速缓冲存储器利用一种算法预先估计中央处理器要从随机存储器中获取的信息，并把它提前从随机存储器取出存到高速缓冲存储器中。当中央处理器需要信息时，首先在高速缓冲存储器中查找。如果估计正确，这些信息就可以迅速传到中央处理器，从而提高了计算机的运行速度。高速缓冲存储器有数据和指令高速缓冲存储器两种。

（4）virtual memory（虚拟存储器）。在具有层次结构存储器的计算机中，它是一种为用户提供比主存容量大得多的可随机访问的地址空间的技术。虚拟存储技术使辅助存储器和主存储器密切配合，对用户来说，好像计算机具有一个容量比实际主存大得多的主存可供使用。

（5）paged virtual memory（页式虚拟存储器）。页式虚拟存储器把虚拟地址空间划分成为一个个固定大小的块，每块称为一页，把主储存器的地址空间也按虚拟地址空间的大小划分为页。页是一种逻辑上的划分，它可以由系统管理软件任意指定。

（6）register file（寄存器组）。是作为指令或数据临时存放的一种多位寄存器组，有时称为栈。

（7）latency（延迟时间，等待时间）。有时也指存储器访问时间。

EXERCISES

1. Multiple choices.

（1）Cache is        .

A．fast             B．slow             C．relatively small             D．high cost

（2）Information stored in semiconductor RAM is        .

A．permanent                                            B．nonpermanent

C．volatile                                                D．non-volatile

（3）We use paged virtual memory to        .

A．extend the size of memory                     B．increase bandwidth of the disk

C．reduce latency of the disk                      D．store large program and data set

（4）We read data on the disk by        .

A．detecting the magnetized spots randomly

B．writing the magnetized spots

C．detecting the magnetized spots sequentially

D．moving the read/write head

（5）The three desiderata of memory system are        .

A．independent                                         B．exclusive

C．closely approximated today                    D．less approximated tomorrow

（6）The processor performance would be high as we reference instructions and data from

        .

A．hard disk                                             B．cache

C．floppy disk                                           D．memory

（7）Page frame is used in        .

A．real memory                                        B．virtual memory

C．disk                                                     D．cache

（8）The register file is        .

A．included in the memory system              B．a program-managed cache

C．called as a stack sometimes                    D．included in the CPU

2. Fill in the blank from using the sentences and definitions found on text.

（1）There are three desiderata in the memory system, they are        .

（2）Even with the high-speed DRAM as real memory, the high-performance processors still have the        problem.

（3）A microcomputer has a built-in ROM chip, it is called sometimes        .

（4）Items stored in RAM can be accessed both easily and in        .

（5）Magnetic disk has two types, they are        .

（6）CD-ROM is abbreviated from        .

（7）         detects or writes magnetized spots on the iron-oxide coating of the tape.

（8）The locations of a RAM are maintained by        .

（9）Main memory is known as        sometimes.

（10）The processor addresses the disk with        .

A．ROM BIOS

B．the control unit

C．Compact Disk-ROM

D．size, speed and cost

E．virtual memory

F．any order (randomly)

G．real memory

H．latency

I．read/write head

J．hard disks and floppy disks

READING MATERIALS

FUTURE MEMORIES

Chipmakers are searching for cheap, fast, “universal” memories to replace DRAM, SRAM and Flash.

For 40 years, systems designers have seen memory densities double every 18 to 24 months while memory chip prices have remained essentially flat, cutting the cost per bit in half each time. As the technical challenges of building ever-smaller memory cells in silicon have increased, however, some memory manufacturers have predicted that the cost curve will start to swing the other way before the end of the decade.

Researchers are working on several alternate technologies that could eventually replace those in the three memory types commonly used today: low-cost dynamic RAM (DRAM), used in PCs and servers; fast static RAM (SRAM), used for processor caches and mobile devices; and nonvolatile flash memory, used in everything from computer BIOS to cell phones.

Researchers at IBM, Intel Corp. and other companies envision the development of a universal memory technology that could someday replace all three.

A universal memory technology could change how computers are designed. For example, nonvolatile RAM could allow computers to boot up and power down instantly because stored information wouldn't be lost when power was. But the emergence of a universal memory technology is probably at least 10 to 15 years away.

Others argue that a universal memory isn't possible because one memory type can't satisfy all needs. For example, nothing could be the fastest and cheapest at the same time.

Most research today is focused on addressing the limitations of one memory technology at a time, such as Flash. But some attributes of today's technologies will be hard to beat.

Most technologies will probably not be able to compete on lowest cost per bit against DRAM or with the fastest SRAM. So they will fall into that space in between. Ferroelectric RAM (FRAM) and magnetoresistive RAM (MRAM) are the best-funded and most-evolved of the emerging memory technologies. FRAM is a nonvolatile RAM that was developed by Ramtron International Corp. in Colorado Springs. It's licensed by Texas Instruments Inc. and others. More than 30 million products have already shipped using FRAM, including metering, radio frequency identification and smart-card devices.

FRAM, which is based on nanoscale “quantum dots”, uses less power and writes faster than DRAM or flash, and it has a long life span. But the technology remains 20 to 50 times more expensive per bit than DRAM, and chip density is far lower. Ramtron is prototyping 1Mbit parts today and hopes to push the technology to 4Mbit or 8Mbit in 2006. Until MRAM is ready for the market, however, FRAM is the only game in town for nonvolatile DRAM.

MRAM is closer to production than most other experimental memories, and IBM and Freescale Semiconductor Inc. are the leading MRAM developers. Researchers call the technology “magnetic storage on a chip” because it adapts the magnetic polarization techniques used in disk drives to silicon. The fast, nonvolatile memory offers a nice combination of high speed, high endurance and reasonable density.

Chip samples can be produced at about the same density and cost per bit as flash. But while promoted as universal memory, the density of MRAM doesn't approach that of DRAM or SRAM. Most interest today is focused on embedded applications.

Several other challengers to conventional memory technologies look promising but are much earlier in their development cycles than FRAM or MRAM.

Phase-change memory (PCM) is a fast, nonvolatile memory that proponents claim could become a universal memory. IBM and Intel have each partnered with other companies to develop the technology.

A transistor in a PCM cell applies energy to either heat or cool the material, forcing it to change between an amorphous (high-resistance) and a crystalline (low-resistance) form. A current is then applied to measure the resistance and establish the state of the memory cell as a 0 or 1.

While PCM technology is much faster than flash, it's slower than SRAM. To be competitive with DRAM, it would also have to support unlimited writes. IBM's research shows that PCM can match flash's 100 000-write limit, but endurance beyond that hasn't been proved. Ovonyx Inc. in Santa Clara, Calif., however, claims that its technology, called Ovonics, can be written to 10 trillion times.

Carbon nanotubes—hollow, tube-shaped lattices of carbon atoms—can be used to make a mechanical memory that works by bending the carbon filament up or down to make or break a connection between two electrodes.

The technology can theoretically scale as small as 5 nanometers and has achieved speeds a few times faster than today's DRAM chips. Nanotube chips could be 10 to 15 times smaller than today's DRAM and could offer a tenfold reduction in power consumption. Initial products are still two to five years away.

Molecular memory, developed by ZettaCore Inc., uses a chemical process to create DRAM memory cells with a molecular capacitor. The “chemically self-assembling” molecules work by adding and removing electrons. This changes the voltage, which is then measured to determine the state (0 or 1). The technique supports four states and can store 2 bits per memory cell. Molecular memories also require 70 percent less power than a standard DRAM memory cell because the capacitor can hold 100 times the charge and therefore needs to refresh memory less frequently.

Molecular memory will allow manufacturers to double or quadruple capacity without increasing costs. Initial products may be available by 2007 or 2008.

Axon Technologies Inc.'s Programmable Metallization Cell memory (PMCm) is a DRAM alternative that's nonvolatile, uses less power and offers higher density than DRAM. In it, tiny quantities of metal self-assemble into a filament as electrons are added to the metal ions. Resistance is then detected to determine the state of the memory cell.

Ultimately, the ability to cost-effectively manufacture new memory technologies using existing fabrication facilities may separate the winners from the losers. To succeed, emerging technology vendors will initially focus on niche markets where they can coexist, rather than compete, with established vendors, and thereby continue to evolve.

MEMORY SUBSYSTEM ORGANIZATION

Memory is also known as internal memory or main memory. It refers to the circuits in the computer that hold whatever programs and data are available for immediate use by the CPU. In this section we will review the different types of physical memory and discuss the memory hierarchy.

TYPES OF MEMORY

There are two major types of memory: Random Access Memory (RAM) and Read Only Memory (ROM). Many computer systems, including personal computers, include both RAM and ROM.

1. RAM

RAM, also called read/write memory, can be used to store data that changes. Unlike ROM, RAM is erasable, temporary, and volatile — meaning that it blanks out each time you turn the computer off. RAM is essential to a computer because it provides rapidly accessible circuitry where the CPU can run your programs and process your data. You may have dozens of computer games or other application software programs stored on a disk, but the computer cannot use them there; when you select a program to run, the computer must first copy it from the disk to RAM where the CPU can access it. It's particularly important to remember that all the data you type into the computer goes directly to RAM. If you want to keep your data permanently, you must save it by copying it to a secondary storage device such as a disk. The amount of RAM in a computer can be very important. If your computer has too little memory, complicated programs will run slowly or won't run at all. To stretch the amount of RAM, an operating system can use a strategy called virtual memory that reserves part of the hard disk for use as an extension to RAM. In a computer with virtual memory, less-used pads of programs are shitted from RAM to a hard disk and are moved back only when needed. Although virtual memory may allow your computer to run large programs, it will reduce the amount of secondary storage and may cause programs to run slowly because it takes time to swap data to and from the hard disk.

（1）DRAM.

RAM chips are differentiated by how they maintain their data. Dynamic RAM or DRAM chips are like leaky capacitors. Initially data is stored in the DRAM chip, charging its memory cells to their maximum values. The charge slowly leaks out and would eventually go too low to represent valid data. Before this happens, however, refresh circuitry reads the contents of the DRAM and rewrites the data to its original locations, thus restoring the memory cells to their maximum charges. DRAM is used to construct the RAM in personal computers.

（2）SRAM.

Static RAM, or SRAM, is more like a register than a leaky capacitor. Once data is written to SRAM, its contents stay valid, and it does not have to be refreshed. Static RAM is faster than DRAM, but it is also much more expensive. The cache memory in personal computers is constructed from SRAM.

2. ROM

ROM chips are designed for applications in which data is only read. These chips are programmed with data by an external programming unit before they are added to the computer system. Once this is done, the data usually does not change. A ROM chip is well suited for this purpose because it is nonvolatile, meaning that the instructions recorded in it do not disappear when the power is off. When you turn the computer on the permanent software in ROM boots the computer. To boot the computer, ROM first tells the CPU to determine what input, output, and storage devices happen to be attached to your computer. Then it instructs the CPU to check a disk to see if it contains operating system software that will let you start-giving commands. The ROM in a typical personal computer also has a variety of self-test routines to make it easier to diagnose and repair hardware failures.

There are several types of ROM chips, which are differentiated by how and how often they can be programmed.

（1）Masked ROM.

A masked ROM, or simply a ROM, is programmed with data as the chip is fabricated. The mask used to create the chip is designed with the required data hard-wired into it. These chips are useful for consumer appliances, where large numbers of units are produced, and, once installed, data will not be changed.

（2）PROM.

A PROM is a programmable ROM. Unlike the ROM, the PROM can be programmed by the user with any standard PROM programmer. Rather than being hard-wired, the PROM has a series of internal connections similar to fuses. Programming data into the PROM essentially blows the proper fuses so that each word of memory stores the correct value. Because these fuses cannot be restored once they are blown, PROMs can only be programmed once. These chips are well suited for prototyping, and for applications that could use a ROM but will not have a sufficient quantity of units manufactured to justify the cost of the ROM mask.

（3）EPROM.

An EPROM is an erasable PROM. As its name implies, an EPROM can be programmed like a PROM, but its contents can be erased and the chip reprogrammed. Programming an EPROM is akin to charging capacitors. The charged and uncharged capacitors cause each word of memory to store the correct value. These chips have a small clear window on their faces. The chip is erased by being placed under ultraviolet light that causes the capacitors to leak their charge, thus we can reset the chip's contents. When in use, the window is usually covered with opaque tape to prevent any ultraviolet rays in room light or sunlight from inadvertently destroying the contents of the chip. Because they are erasable, but are used in applications where their data does not change, EPROMs are typically used in product development labs and in prototypes.

（4）EEPROM or E²PROM.

An EEPROM, sometimes denoted as E²PROM, is an electrically erasable PROM. It works like an EPROM, except that its contents are erased and reprogrammed electrically, rather than by using ultraviolet light. Unlike the EPROM, which must be entirely erased and then reprogrammed, it is possible to modify individual locations of the EEPROM while leaving other locations unchanged. Also, it takes only seconds to reprogram an EEPROM, it takes about 20 minutes to erase an EPROM. EEPROMs can be used in applications where the contents will be changed only rarely, as long as the programming hardware needed to reprogram the chip is included in the system circuitry. One common use for EEPROMs is the basic input/output system, or BIOS, of personal computers. This chip is usually not modified, except once or twice in the computer's lifetime when the BIOS is updated with a newer version of its software.

（5）Flash EEPROM.

A special type of EEPROM called a Flash EEPROM is electrically erasable in blocks of data, rather than individual locations. It is well suited for applications that write blocks of data and can be used as a solid stated hard disk. It is also used for data storage in digital cameras. Flash EEPROM can only be rewritten with data a finite number of times, which currently limits its widespread use in computer systems.

RAM and ROM chips are available in a variety of sizes. If the memory needed for the computer is larger than the capacity of one chip, it is necessary to combine a number of chips to form the required memory size.

MEMORY HIERARCHY

The memory hierarchy system consists of all storage devices employed in a computer system from the slow but high-capacity auxiliary memory to a relatively faster main memory, to an even small and faster cache memory accessible to the high-speed processing logic. The components in a typical memory hierarchy are shown in Fig 1-7.

Fig. 1-7  A typical memory hierarchy

The memory unit that communicates directly with the CPU is called the main memory. Devices that provide backup storage are called auxiliary memory. The most common auxiliary memory devices used in computer systems are magnetic disks and tapes. They are used for storing system programs, large data files, and other backup information. Only programs and data currently needed by the CPU reside in main memory. All other information is stored in auxiliary memory and transferred to main memory when needed. When programs not resided in main memory are needed by the CPU, they are brought in from auxiliary memory. Programs not currently needed in main memory are transferred into auxiliary memory to provide space for currently used programs and data.

A special very-high-speed memory called a cache is sometimes used to increase the speed of processing by making current programs and data available to the CPU at a rapid rate. The cache memory is employed in computer systems to compensate for the speed differential between main memory access time and processor logic. CPU logic is usually faster than main memory access time, with the result that processing speed is limited primari1y by the speed of main memory. A technique used to compensate for the mismatch in operating speeds is to employ an extremely fast, small cache between the CPU and main memory whose access time is close to processor logic clock cycle time. The cache is used for storing segments of programs currently being executed in the CPU and temporary data frequently needed in the present calculations. By making programs and data available at a rapid rate, it is possible to increase the performance rate of the computer.

Fig. 1-7 shows the CPU has direct access to both cache and main memory but not to auxiliarymemory. In memory hierarchy system, each component is involved with a different level. The reason for having two or three levels of memory hierarchy is economics. As storage capacity of the memory increases, the cost per bit for storing binary information decreases and the access time of the memory becomes longer. The auxiliary memory has a large storage capacity, is relatively inexpensive, but has low access speed compared to main memory. The cache memory is very small, relatively expensive, and has very high access speed. Thus as the memory access speed increases, so does its relative cost. The overall goal of using a memory hierarchy is to obtain the highest-possible average access speed while minimizing the total cost of the entire memory system.

RAM AND ROM CHIPS

A RAM chip is better suited for communication with the CPU if it has one or more control inputs that select the chip only when needed. Another common feature is a bi-directional data bus that allows the transfer of data either from memory to CPU during a read operation, or from CPU to memory during a write operation. A bi-directional bus can be constructed with three-state buffers. A three-state buffer output can be placed in one of three possible states: a signal equivalent to logic 1, a signal equivalent to logic 0, or a high-impedance state. The logic 1 and 0 are normal digital signals. The high-impedance state behaves like an open circuit, which means that the output does not carry a signal and has no logic significance.

For example, a 1024×8 memory constructed with 128×8 RAM chips and 512×8 ROM chips. The capacity of a RAM chip is 128 words of eight bits (one byte) per word. This requires a 7-bit address and an 8-bit bi-directional data bus. The read and write inputs specify the memory operation and the two chips select (CS) control input are for enabling the chip only when it is selected by the microprocessor. The availability of more than one control input to select the chip facilitates the decoding of the address lines when multiple chips are used in the microcomputer. The read and write inputs are sometimes combined into one line labeled R/W. When the chip is selected, the two binary states in this line specify the two operations of read or write.

The unit is in operation only when CS1=1 and CS2=0. The bar on top of the second select variable indicates that this input is enabled when it is equal to 0. If the chip select inputs are no enabled, or if they are enabled but the read or write inputs are no enabled, the memory is inhibited and its data bus is in a high-impedance state. When CS1=1 and CS2=0, the memory can be placed in a write or read mode. When the WR input is enabled, the memory stores a byte from the data bus into a location specified by the address input lines. When the RD input is enabled, the content of the selected byte is placed into the data bus. The RD and WR signals control the memory operation as well as the bus buffers associated with the bi-direction data bus.

A ROM chip is organized externally in a similar manner. However, since a ROM can only read, the data bus runs only in an output mode. For the same-size chip, it is possible to have more bits of ROM than of RAM, because the internal binary cells in ROM occupy less space than in RAM. For this reason, the diagram specifies a 512-bytes ROM, while the RAM has only 128 bytes.

The nine address lines in the ROM chip specify any one of the 512 bytes stored in it. The two chip select inputs must be CS1=1 and CS2=0 for the unit to operate. Otherwise, the data bus is in a high-impedance state. There is no need for a read or write control because the unit can only read. Thus when the chip is enabled by the two select inputs, the byte selected by the address lines appears on the data bus.

VIRTUAL MEMORY

In a memory hierarchy system, program and data are first stored in auxiliary memory. Portions of a program or data are brought into main memory, as they are needed by the CPU. Virtual memory is a concept used in some large computer systems that permit the user to construct programs as though a large memory space were available, equal to the totality of auxiliary memory. Each address that is referenced by the CPU goes through an address mapping from the so-called virtual address to a physical address in main memory. Virtual memory is used to give programmers the illusion that they have a very large memory at their disposal, even though the computer actually has a relatively small memory. A virtual memory system provides a mechanism for translating program-generated addresses into correct main memory locations. This is done dynamically, while programs are being executed in the CPU. The translation or mapping is handled automatically by the hardware by means of a mapping table.

TYPES OF INTERRUPT

There are three types of interrupts, each with several different uses. Although each type serves a different purpose, the procedures for processing all types of interrupts are almost identical.

External interrupts are used by the CPU to interact with input/output devices. The example, in which the CPU requests a data transfer and the input device assert an interrupt when it is ready, is a popular way to use interrupts. External interrupts improve system performance by allowing the CPU to execute instructions, instead of just waiting for the I/O device, while still performing the required data transfer. External interrupts can also be used to initiate transfers, rather than to signal event completion.

Internal interrupts occur entirely within the CPU; no input/output devices play any role in these interrupts. Some interrupts in this class are purposely introduced as part of the system's function. For example, a timer built into the CPU may generate an interrupt at a predetermined interval, such as every 0.1 seconds. This interrupt could be used to allocate CPU time to different tasks in a multitasking operating system. This would ensure that each task gets its appropriate time slices while relieving the software of the job of tracking time; the timer and internal interrupt take care of this. Internal interrupts can also be used to handle exceptions that occur during the execution of valid instructions. As an example, a CPU might contain a perfectly valid divide instruction that generates an exception when its divisor is 0. In addition to the divide by zero exception, other exceptions include arithmetic overflow and page faults. Besides these exceptions, which may or may not occur, depending on the value of the operands, invalid instruction codes are also handled by internal interrupts.